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MIPI I3C Basic Simplifies Design Development for a Wide Range of Products including smartphones, portable devices and systems in automobiles and server environments
PISCATAWAY, NJ – (BUSINESS WIRE) – The MIPI Alliance, an international organization that develops interface specifications for the mobile and mobile-influenced industries, today announced the first update to its MIPI I3C specification Basic accessible to the public and royalty-free. Version 1.1.1 dramatically improves the speed and flexibility of I3C Basic, simplifying the development of innovative designs for products such as smartphones, wearable devices, and systems in automobiles and server environments.
As a successor to the older I2C interface, MIPI I3C / I3C Basic provides a scalable, medium-speed control and utility bus interface to connect devices to application processors, streamline integration, and improve cost efficiency. The specification uses a two-wire interface and supports in-band interrupts, reducing the footprint of printed circuit boards (PCBs) compared to other control bus solutions. I3C can be used to integrate a wide variety of peripherals and sensors with application processors.
Available for implementation without MIPI Alliance membership, I3C Basic is a subset of the full MIPI I3C specification that groups the features most commonly required by developers and other standards organizations.
The updated version of I3C Basic allows expandable use of additional bus lanes to increase the speed of the interface to nearly 100 MHz, thus protecting the interface from increasing speed requirements. The new version includes two High Data Rate (HDR) modes – HDR Double Data Rate (HDR-DDR) and HDR Bulk Transport (HDR-BT) – which are designed to transfer more data at the same bus frequency:
HDR-DDR with support for Common Command Codes (CCC) and flow controls doubles the raw data rate to 25 Mbps on a single lane compared to I3C Basic’s Single Data Rate (SDR) mode.
HDR-BT with CCC support enables efficient mass transport of data over up to four lanes. It can allow raw data rates of up to 100 Mbps.
Another feature added to I3C Basic v1.1.1 was the standardized target reset, which improves the specification’s ability to reset a specific device, allowing better recovery from error conditions. This mechanism allows a controller to reset one or more selected targets and avoid resetting others; supports different reset levels, ranging from resetting a single I3C device in a target to resetting the entire target device; and supports I3C’s error escalation mechanism, including resetting a stray target.
“The new version of I3C Basic is more closely aligned with the I3C Core specification so that the mobile ecosystem and the wider community of system integrators can implement it more effectively and efficiently in an ever-increasing variety. applications, ”said Joel Huloux, president of Alliance MIPI. “With these updates, we continue to strengthen the I2C upgrade path and advance I3C as a universal utility and control bus. ”
I3C Basic has also been the centerpiece of several industrial collaborations. It has been adopted by JEDEC in its Sideband Bus and DDR5 standards, and is an area of focus for MIPI liaison relationships with DMTF (Distributed Management Task Force), ETSI (European Telecommunications Standards Institute) and TCA (Trusted Connectivity Alliance) . The original I3C v1.0 specification was the result of an extensive industrial collaboration over several years, in particular with the MEMS & Sensors Industry Group.
Along with the release of I3C Basic v1.1.1, MIPI Alliance has also updated the I3C Basic Specification, now v1.1.1 and available only to members, to provide additional clarifications and details compared to the version. former. I3C and I3C Basic v1.1.1 have also been revised to replace offensive terms with those that more accurately reflect the functions of technical devices.
A variety of system solution resources have been introduced to help developers and support the growing I3C ecosystem:
MIPI Discovery and Configuration (MIPI DisCo) for I3C, a software framework designed to simplify the software integration of sensors and other devices that use the I3C / I3C Basic device interface, by allowing major operating systems to identify MIPI compliant external devices in mobiles and mobiles – influence systems and automatically implement drivers for them
MIPI I3C Host Controller Interface (HCI), a common set of capabilities for the host controller and the software interface
MIPI I3C HCI Driver for Linux, defining device-specific operations for compliant MIPI I3C host controller hardware implementations from multiple vendors
MIPI Debug for I3C, a minimal pin bare-metal interface for transporting debug commands and data between a Debug and Test System (DTS) and a Target System (TS)
The MIPI I3C Working Group recently presented the “What’s New in MIPI I3C Basic and the I3C Ecosystem” webinar, which is now available on demand. The upcoming MIPI DevCon virtual event (September 28-29) will also feature presentations and a panel discussion focusing on the latest developments in the I3C world.
In addition to these training opportunities, several new resources have been made available, including a compliance test suite for I3C / I3C Basic, updated FAQs, and two application notes – one focused on functionality. I3C Hot-Join and the second on the integration of virtual and target devices.
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About MIPI Alliance
MIPI Alliance (MIPI) develops interface specifications for the mobile and mobile influenced industries. There is at least one MIPI specification in every smartphone manufactured today. Founded in 2003, the organization has more than 325 member companies worldwide and more than 15 active working groups providing specifications within the mobile ecosystem. Members of the organization include handset manufacturers, device OEMs, software vendors, semiconductor companies, application processor developers, IP tool vendors, automotive OEMs, and Tier 1 suppliers, test and test equipment companies, as well as manufacturers of cameras, tablets and laptops. For more information, please visit www.mipi.org.
MIPI® and I3C® are registered trademarks owned by MIPI Alliance. I3C BasicSM, Debug for I3CSM, I3C HCISM, and DisCo for I3CSM are service marks of MIPI Alliance.
Interpretation for MIPI Alliance
Source: MIPI Alliance